From 65451d68f85b32067bf7a70a7bb296995d52a22f Mon Sep 17 00:00:00 2001 From: Shengyu Liu Date: Tue, 22 Apr 2025 17:10:46 +0800 Subject: [PATCH] Add background color for MLA Kernel Sched.drawio.svg --- docs/assets/MLA Kernel Sched.drawio.svg | 352 ++++++++++++------------ 1 file changed, 178 insertions(+), 174 deletions(-) diff --git a/docs/assets/MLA Kernel Sched.drawio.svg b/docs/assets/MLA Kernel Sched.drawio.svg index a1bd058..f3e94a5 100644 --- a/docs/assets/MLA Kernel Sched.drawio.svg +++ b/docs/assets/MLA Kernel Sched.drawio.svg @@ -1,16 +1,20 @@ - + + - - - + + + + + + -
+
rP0 = sQ @ sK0 @@ -18,22 +22,22 @@
- + rP0 = sQ @ sK0 - - - + + + -
+
rP1 = sQ @ sK1 @@ -41,22 +45,22 @@
- + rP1 = sQ @ sK1 - - - + + + -
+
@@ -88,22 +92,22 @@
- + Get sScale0... - - - + + + -
+
Issue @@ -111,22 +115,22 @@
- + Issue - - - + + + -
+
rO0 += rPb @ sV0L @@ -134,22 +138,22 @@
- + rO0 += rPb @ sV0L - - - + + + -
+
@@ -187,26 +191,26 @@
- + Get sScale1... - - + + - - - + + + -
+
Issue @@ -214,22 +218,22 @@
- + Issue - - - + + + -
+
rO1 += rP1b @ sV1R @@ -237,22 +241,22 @@
- + rO1 += rP1b @ sV1R - - - + + + -
+
rO0 = Scale(rO0) @@ -260,26 +264,26 @@
- + rO0 = Scale(rO0) - - + + - - - + + + -
+
rO0 += sP1 @ sV1L @@ -287,22 +291,22 @@
- + rO0 += sP1 @ sV1L - - - + + + -
+
rO1 += sP0 @ sV0R @@ -310,38 +314,38 @@
- + rO1 += sP0 @ sV0R - - + + - - + + - - + + - - + + - - - + + + -
+
sP0 = Scale(rP0) @@ -349,20 +353,20 @@
- + sP0 = Scale(rP0) - + -
+
Tensor @@ -370,20 +374,20 @@
- + Tensor - + -
+
CUDA @@ -391,20 +395,20 @@
- + CUDA - + -
+
CUDA @@ -412,20 +416,20 @@
- + CUDA - + -
+
Tensor @@ -433,20 +437,20 @@
- + Tensor - + -
+
Warpgroup 0 @@ -454,20 +458,20 @@
- + Warpgroup 0 - + -
+
Warpgroup 1 @@ -475,29 +479,29 @@
- + Warpgroup 1 - + - - + + - - - + + + -
+
Issue @@ -505,34 +509,34 @@
- + Issue - - + + - - + + - - + + - - - + + + -
+
Issue @@ -540,22 +544,22 @@
- + Issue - - - + + + -
+
Pipelined TMA wait and issue @@ -563,26 +567,26 @@
- + Pipelined TMA wait and issue - - + + - - - + + + -
+
Pipelined TMA wait and issue @@ -590,22 +594,22 @@
- + Pipelined TMA wait and issue - - - + + + -
+
sP1 = rP1b @@ -613,23 +617,23 @@
- + sP1 = rP1b - + - + -
+
wg0-bunch-0 @@ -637,23 +641,23 @@
- + wg0-bunch-0 - + - + -
+
wg1-bunch-0 @@ -661,22 +665,22 @@
- + wg1-bunch-0 - - - + + + -
+
Issue TMA (nxt V0L) @@ -684,22 +688,22 @@
- + Issue TMA (nxt V0L) - - - + + + -
+
Issue TMA (nxt V1L) @@ -707,30 +711,30 @@
- + Issue TMA (nxt V1L) - - + + - - + + - - - + + + -
+
Issue TMA (nxt V1R) @@ -738,22 +742,22 @@
- + Issue TMA (nxt V1R) - - - + + + -
+
Issue TMA (nxt V0R) @@ -761,32 +765,32 @@
- + Issue TMA (nxt V0R) - - + + - - + + - - + + - + -
+
sXX: Stored on shared memory @@ -797,29 +801,29 @@
- + sXX: Stored on shared memory... - + - + - + - + -
+
@@ -834,7 +838,7 @@
- + Loop boundary in our code...