Chenggang Zhao
1b92be8a71
Add automatic warp count control for low-latency kernels ( #213 )
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* Add automatic warp count control for low-latency dispatch
* Add automatic warp count control for low-latency combine
* More assertions
2025-06-16 11:56:43 +08:00
Shifang Xu
21efbe9b48
Support UE8M0 data format. ( #206 )
2025-06-12 09:38:19 +08:00
Chenggang Zhao
b8d90fb753
Support Ampere architecture ( #204 )
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* Update README
* Update `setup.py`
* Fix headers
* Add `DISABLE_NVSHMEM` for APIs
* Fix launch
* Fix TMA settings
* Fix TMA usages
* Fix dlink
* Separate layout kernels
* Update version
* Add `is_sm90_compiled`
* Fix tests
* Add NVLink connection checks
* Update README
* Fix tests
* Add some comments
* Minor fix
* Minor fix
* Fix bugs
2025-06-11 15:48:18 +08:00
Chenggang Zhao
8da2d7b38d
Fully remove barrier FIFO designs ( #200 )
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* Fully remove FIFO slots
* Fully remove FIFO buffers
* Minor fix styles
* Fix some typos
* Bugs fixed
* Cleanup `ibgda_poll_cq`
2025-06-10 16:23:20 +08:00
Chenggang Zhao
564e375234
Fix < PTX ISA 8.6 compatibility ( #194 )
2025-06-09 10:48:42 +08:00
Chenggang Zhao
c8dceba110
Use TMA instead of LD/ST for intra-node normal kernels ( #191 )
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* Update CMake files
* Use TMA instead of LD/ST for intranode dispatch
* Use TMA instead of LD/ST for intranode combine
* Adjust configs
* Test default configs as well
* More warps for combine
* Add inter-thread fence
* Enable more warps
* Do not use TMA for senders
* Update configs
* Remove useless wait
2025-06-06 15:40:17 +08:00
Chenggang Zhao
77bb07aa20
Update some comments and docs
2025-02-27 10:27:22 +08:00
Chenggang Zhao
ebfe47e46f
Initial commit
2025-02-25 09:07:53 +08:00
