Shangyan Zhou
4931324861
Support bias. ( #257 )
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* Support bias.
* Fix.
* Fix style.
2025-06-25 18:12:33 +08:00
Shangyan Zhou
77f97f79bd
Fix the tail loading issue. ( #219 )
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* Fix the tail loading issue.
* Modify the sync offset.
2025-06-18 09:23:25 +08:00
Shangyan Zhou
dd133d39bc
Fix warp synchronization. ( #215 )
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* Fix warp synchronization.
* Another fix.
2025-06-16 17:05:11 +08:00
Shangyan Zhou
483f00af84
Update assertion of num_rc_per_pe.
2025-06-13 15:16:23 +08:00
Zhicheng Wu
05df5554ff
Use one qp per sm for internode normal kernels ( #181 )
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let the sender SM use the channel_id, and the receiver SM use channel_id + num_channels
2025-06-13 14:37:59 +08:00
Shifang Xu
21efbe9b48
Support UE8M0 data format. ( #206 )
2025-06-12 09:38:19 +08:00
Chenggang Zhao
b8d90fb753
Support Ampere architecture ( #204 )
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* Update README
* Update `setup.py`
* Fix headers
* Add `DISABLE_NVSHMEM` for APIs
* Fix launch
* Fix TMA settings
* Fix TMA usages
* Fix dlink
* Separate layout kernels
* Update version
* Add `is_sm90_compiled`
* Fix tests
* Add NVLink connection checks
* Update README
* Fix tests
* Add some comments
* Minor fix
* Minor fix
* Fix bugs
2025-06-11 15:48:18 +08:00
Chenggang Zhao
8da2d7b38d
Fully remove barrier FIFO designs ( #200 )
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* Fully remove FIFO slots
* Fully remove FIFO buffers
* Minor fix styles
* Fix some typos
* Bugs fixed
* Cleanup `ibgda_poll_cq`
2025-06-10 16:23:20 +08:00
wzc.wuzhicheng
d0225df27d
Fix notify_dispatch: using warp 0 to issue send
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Signed-off-by: wzc.wuzhicheng <wzc.wuzhicheng@linux.alibaba.com>
2025-06-03 20:20:02 +08:00
Shangyan Zhou
9fe9021f29
Use IBGDA only ( #177 )
2025-05-28 16:40:14 +08:00
wangfakang
63c29d06a0
To mitigate incast congestion, shuffle the starting index of target rank for different ranks and channels
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Signed-off-by: wangfakang <fakangwang@gmail.com>
2025-05-10 09:55:35 +08:00
Shangyan Zhou
e255d57bef
Use put_nbi_warp.
2025-04-22 12:29:46 +08:00
Chenggang Zhao
edbb1bc3ff
Several code lints
2025-04-22 10:52:10 +08:00
Shangyan Zhou
20b2aaaf9e
Refactor some code.
2025-04-22 10:22:30 +08:00
Shangyan Zhou
e2c578485c
Revert ibgda_device.cuh and remove some comments.
2025-04-21 17:44:32 +08:00
moningchen
5ab80c28f3
In the Internode Normal Kernel, when using nvshmem ibrc for RDMA data transmission, a single QP is used for data transfer between two GPUs, which limits kernel performance in network card dual-port and RoCE network scenarios.
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In our optimized Internode Normal Kernel, we implemented multiple QPs for data transmission between two GPUs, setting a different QP for each channel. Additionally, we modified the transmission method from IBRC to IBGAD.
Through these optimizations, the Internode Normal Kernel achieves optimal performance in both H800 and H20 environments, with RDMA transmission performance nearly reaching the physical network performance limit. Using the current default statistical method, in 4-node H800 and H20 environments, RDMA performance can reach 60GB/s+.
2025-04-21 15:50:39 +08:00
Chenggang Zhao
c4d12b4f8f
Fix compilation
2025-03-28 16:45:10 +08:00
songhexiang
4dd1e68ac8
For the SMs which calculate metadata in notify_dispatch, each warp in the SM is used to calculate the metadata of one channel. The default configuration is 8 warps for 10 channels, which needs two rounds of loop. Maybe the number of warps can be configured to the number of the channels so that one loop is enough.
2025-03-28 06:43:29 +00:00
Chenggang Zhao
1fc40d50f3
Improve AR performance
2025-03-06 21:41:19 +08:00
Chenggang Zhao
458cdcb22a
Fix AR bugs for normal kernels
2025-03-05 17:13:35 +08:00
Chenggang Zhao
680e424bdc
Bugs fixed
2025-03-05 14:27:45 +08:00
Chenggang Zhao
ebfe47e46f
Initial commit
2025-02-25 09:07:53 +08:00
