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https://github.com/deepseek-ai/DeepEP
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Fully remove barrier FIFO designs (#200)
* Fully remove FIFO slots * Fully remove FIFO buffers * Minor fix styles * Fix some typos * Bugs fixed * Cleanup `ibgda_poll_cq`
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@@ -164,7 +164,7 @@ void ibgda_submit_requests(nvshmemi_ibgda_device_qp_t *qp, uint64_t base_wqe_idx
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__device__ static __forceinline__ void
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ibgda_write_rdma_write_inl_wqe(nvshmemi_ibgda_device_qp_t *qp, const uint32_t *val, uint64_t raddr,
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__be32 rkey, uint16_t wqe_idx, void **out_wqes, uint32_t imm) {
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__be32 rkey, uint16_t wqe_idx, void** out_wqes, uint32_t imm) {
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ibgda_ctrl_seg_t ctrl_seg;
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struct mlx5_wqe_raddr_seg raddr_seg;
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struct mlx5_wqe_inl_data_seg inl_seg;
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@@ -277,7 +277,7 @@ nvshmemi_ibgda_rma_p(int *rptr, const int value, int dst_pe, int qp_id, uint32_t
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__device__ static __forceinline__ void
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ibgda_write_rdma_write_wqe(nvshmemi_ibgda_device_qp_t *qp, uint64_t laddr, __be32 lkey,
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uint64_t raddr, __be32 rkey, uint32_t bytes, uint16_t wqe_idx,
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void **out_wqes) {
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void** out_wqes) {
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ibgda_ctrl_seg_t ctrl_seg;
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struct mlx5_wqe_raddr_seg raddr_seg;
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struct mlx5_wqe_data_seg data_seg;
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@@ -373,7 +373,7 @@ nvshmemi_ibgda_put_nbi_warp(uint64_t req_rptr, uint64_t req_lptr, size_t bytes,
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__device__ static __forceinline__ void ibgda_write_amo_add_wqe(
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nvshmemi_ibgda_device_qp_t *qp, const int &value,
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uint64_t laddr, __be32 lkey, uint64_t raddr, __be32 rkey,
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uint16_t wqe_idx, void **out_wqes) {
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uint16_t wqe_idx, void** out_wqes) {
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ibgda_ctrl_seg_t ctrl_seg = {0};
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struct mlx5_wqe_raddr_seg raddr_seg;
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struct mlx5_wqe_atomic_seg atomic_seg_1;
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@@ -448,40 +448,27 @@ __device__ __forceinline__ uint64_t nvshmemi_get_p2p_ptr(const uint64_t& ptr, co
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// This is a simplified version of NVSHMEM's `ibgda_poll_cq`.
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// Note that this implementation does not guarantee thread safety,
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// so we must ensure that no other threads are concurrently using the same QP.
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__device__ static __forceinline__ int
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__device__ static __forceinline__ void
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ibgda_poll_cq(nvshmemi_ibgda_device_cq_t *cq, uint64_t idx) {
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int status = 0;
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struct mlx5_cqe64 *cqe64 = (struct mlx5_cqe64 *)cq->cqe;
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const auto cqe64 = static_cast<mlx5_cqe64*>(cq->cqe);
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const uint32_t ncqes = cq->ncqes;
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memory_fence_cta();
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// NOTES: this while loop is part of do-while below.
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// `wqe_counter` is the HW consumer index. However, we always maintain `index + 1`.
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// To be able to compare with the index, we need to use `wqe_counter + 1`.
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// Because `wqe_counter` is `uint16_t`, it may be overflow. Still, we know for
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// sure that if `idx - wqe_counter - 1 < ncqes`, `wqe_counter + 1 is less than
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// idx, and thus we need to wait. We don't need to wait when `idx == wqe_counter + 1`
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// That's why we use `- 2` here to make this case overflow.
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uint16_t wqe_counter;
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uint16_t new_wqe_counter;
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memory_fence_cta();
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do {
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new_wqe_counter = ld_na_relaxed(&cqe64->wqe_counter);
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new_wqe_counter = HtoBE16(new_wqe_counter);
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wqe_counter = new_wqe_counter;
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}
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// NOTE: This while loop is part of do while above.
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// wqe_counter is the HW consumer index. However, we always maintain index
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// + 1 in SW. To be able to compare with idx, we need to use wqe_counter +
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// 1. Because wqe_counter is uint16_t, it may wraparound. Still we know for
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// sure that if idx - wqe_counter - 1 < ncqes, wqe_counter + 1 is less than
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// idx, and thus we need to wait. We don't need to wait when idx ==
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// wqe_counter + 1. That's why we use - (uint16_t)2 here to make this case
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// wraparound.
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// Example:
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// if idx = 10, we wait until wqe_counter = 9, idx - wqe_counter - 2 = 65535 > ncqes.
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while (((uint16_t)((uint16_t)idx - wqe_counter - (uint16_t)2) < ncqes));
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wqe_counter = HtoBE16(ld_na_relaxed(&cqe64->wqe_counter));
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} while ((static_cast<uint16_t>(static_cast<uint16_t>(idx) - wqe_counter - static_cast<uint16_t>(2)) < ncqes));
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*cq->cons_idx = idx;
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// Prevent reordering of this function and subsequent instructions
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memory_fence_cta();
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return status;
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// Prevent reordering of this function and later instructions
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memory_fence_cta();
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}
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// Wait until wqe `idx - 1` is completed.
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