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https://github.com/deepseek-ai/DeepEP
synced 2025-06-26 18:28:11 +00:00
Remove the low-latency usage flag
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1b92be8a71
commit
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@ -78,13 +78,6 @@ Buffer::Buffer(int rank, int num_ranks, int64_t num_nvl_bytes, int64_t num_rdma_
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CUDA_CHECK(cudaHostGetDevicePointer(&moe_recv_rdma_counter_mapped, const_cast<int*>(moe_recv_rdma_counter), 0));
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*moe_recv_rdma_counter = -1;
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}
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// Low-latency kernels' usage flag
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if (low_latency_mode) {
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CUDA_CHECK(cudaMallocHost(&low_latency_usage_flag, sizeof(int), cudaHostAllocMapped));
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CUDA_CHECK(cudaHostGetDevicePointer(&low_latency_usage_flag_mapped, const_cast<int*>(low_latency_usage_flag), 0));
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*low_latency_usage_flag = 0;
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}
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}
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Buffer::~Buffer() noexcept(false) {
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@ -1028,16 +1021,6 @@ Buffer::internode_combine(const torch::Tensor& x, const std::optional<torch::Ten
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#endif
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}
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uint64_t Buffer::get_low_latency_usage_flag() const {
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#ifndef DISABLE_NVSHMEM
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EP_HOST_ASSERT(low_latency_usage_flag != nullptr);
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return reinterpret_cast<uint64_t>(low_latency_usage_flag);
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#else
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EP_HOST_ASSERT(false and "NVSHMEM is disable during compilation");
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return 0;
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#endif
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}
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void Buffer::clean_low_latency_buffer(int num_max_dispatch_tokens_per_rank, int hidden, int num_experts) {
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#ifndef DISABLE_NVSHMEM
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EP_HOST_ASSERT(low_latency_mode);
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@ -1143,9 +1126,8 @@ Buffer::low_latency_dispatch(const torch::Tensor& x, const torch::Tensor& topk_i
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num_tokens, hidden, num_max_dispatch_tokens_per_rank,
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num_topk, num_experts, rank, num_ranks,
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use_fp8, round_scale, use_ue8m0,
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workspace, low_latency_usage_flag_mapped,
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num_device_sms, launch_stream,
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phases);
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workspace, num_device_sms,
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launch_stream, phases);
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};
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launcher(return_recv_hook ? LOW_LATENCY_SEND_PHASE : (LOW_LATENCY_SEND_PHASE | LOW_LATENCY_RECV_PHASE));
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@ -1237,9 +1219,8 @@ Buffer::low_latency_combine(const torch::Tensor& x, const torch::Tensor& topk_id
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next_clean_meta.first, next_clean_meta.second,
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num_combined_tokens, hidden, num_max_dispatch_tokens_per_rank,
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num_topk, num_experts, rank, num_ranks,
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workspace, low_latency_usage_flag_mapped,
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num_device_sms, launch_stream,
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phases, zero_copy);
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workspace, num_device_sms,
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launch_stream, phases, zero_copy);
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};
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launcher(return_recv_hook ? LOW_LATENCY_SEND_PHASE : (LOW_LATENCY_SEND_PHASE | LOW_LATENCY_RECV_PHASE));
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@ -1328,7 +1309,6 @@ PYBIND11_MODULE(TORCH_EXTENSION_NAME, m) {
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.def("intranode_combine", &deep_ep::Buffer::intranode_combine)
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.def("internode_dispatch", &deep_ep::Buffer::internode_dispatch)
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.def("internode_combine", &deep_ep::Buffer::internode_combine)
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.def("get_low_latency_usage_flag", &deep_ep::Buffer::get_low_latency_usage_flag)
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.def("clean_low_latency_buffer", &deep_ep::Buffer::clean_low_latency_buffer)
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.def("low_latency_dispatch", &deep_ep::Buffer::low_latency_dispatch)
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.def("low_latency_combine", &deep_ep::Buffer::low_latency_combine)
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@ -71,10 +71,6 @@ private:
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volatile int* moe_recv_rdma_counter = nullptr;
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int* moe_recv_rdma_counter_mapped = nullptr;
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// Host-side low-latency kernels' usages
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volatile int* low_latency_usage_flag = nullptr;
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int* low_latency_usage_flag_mapped = nullptr;
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public:
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Buffer(int rank, int num_ranks, int64_t num_nvl_bytes, int64_t num_rdma_bytes, bool low_latency_mode);
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@ -134,8 +130,6 @@ public:
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const torch::Tensor& combined_rdma_head, const torch::Tensor& combined_nvl_head,
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const Config& config, std::optional<EventHandle>& previous_event, bool async, bool allocate_on_comm_stream);
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uint64_t get_low_latency_usage_flag() const;
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void clean_low_latency_buffer(int num_max_dispatch_tokens_per_rank, int hidden, int num_experts);
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std::tuple<torch::Tensor, std::optional<torch::Tensor>, torch::Tensor, torch::Tensor, torch::Tensor, std::optional<EventHandle>, std::optional<std::function<void()>>>
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@ -147,9 +147,8 @@ void dispatch(void* packed_recv_x, void* packed_recv_x_scales,
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int num_tokens, int hidden, int num_max_dispatch_tokens_per_rank,
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int num_topk, int num_experts, int rank, int num_ranks,
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bool use_fp8, bool round_scale, bool use_ue8m0,
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void* workspace, int* usage_flag,
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int num_device_sms, cudaStream_t stream,
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int phases);
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void* workspace, int num_device_sms,
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cudaStream_t stream, int phases);
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void combine(void* combined_x,
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void* rdma_recv_x, int* rdma_recv_flag, void* rdma_send_x,
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@ -158,9 +157,8 @@ void combine(void* combined_x,
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int* next_clean, int num_next_clean_int,
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int num_combined_tokens, int hidden, int num_max_dispatch_tokens_per_rank,
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int num_topk, int num_experts, int rank, int num_ranks,
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void* workspace, int* usage_flag,
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int num_device_sms, cudaStream_t stream,
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int phases, bool zero_copy);
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void* workspace, int num_device_sms,
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cudaStream_t stream, int phases, bool zero_copy);
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} // namespace internode_ll
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@ -48,9 +48,8 @@ dispatch(void* packed_recv_x, void* packed_recv_x_scales,
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int* next_clean, int num_next_clean_int,
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int num_tokens, int num_max_dispatch_tokens_per_rank,
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int num_topk, int num_experts, int rank, int num_ranks,
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bool round_scale, int* usage_flag,
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int num_warp_groups, int num_warps_per_group,
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int phases) {
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bool round_scale, int phases) {
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const auto sm_id = static_cast<int>(blockIdx.x);
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const auto thread_id = static_cast<int>(threadIdx.x);
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const auto warp_id = thread_id / 32, lane_id = get_lane_id();
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@ -189,10 +188,6 @@ dispatch(void* packed_recv_x, void* packed_recv_x_scales,
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#pragma unroll
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for (int i = lane_id; i < num_experts; i += 32)
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atomic_add_release_global(atomic_finish_counter_per_expert + i, FINISHED_SUM_TAG);
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} else if (sm_id == 1) {
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// The second SM is also responsible for notifying PCIe usage
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if (lane_id == 0)
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atomicAdd_system(usage_flag, 1);
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}
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// This SM should be responsible for some destination experts, read `topk_idx` for them
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@ -341,9 +336,8 @@ void dispatch(void* packed_recv_x, void* packed_recv_x_scales,
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int num_tokens, int hidden, int num_max_dispatch_tokens_per_rank,
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int num_topk, int num_experts, int rank, int num_ranks,
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bool use_fp8, bool round_scale, bool use_ue8m0,
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void* workspace, int* usage_flag,
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int num_device_sms, cudaStream_t stream,
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int phases) {
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void* workspace, int num_device_sms,
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cudaStream_t stream, int phases) {
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constexpr int kNumMaxTopK = 9;
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const int num_warp_groups = ceil_div(num_experts, num_device_sms);
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const int num_warps_per_group = 32 / num_warp_groups;
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@ -380,9 +374,8 @@ LAUNCH_KERNEL(&cfg, dispatch_func, \
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next_clean, num_next_clean_int, \
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num_tokens, num_max_dispatch_tokens_per_rank, \
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num_topk, num_experts, rank, num_ranks, \
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round_scale, usage_flag, \
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num_warp_groups, num_warps_per_group, \
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phases); } break
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round_scale, phases); } break
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SETUP_LAUNCH_CONFIG(num_sms, num_warps * 32, stream);
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SWITCH_HIDDEN(DISPATCH_LAUNCH_CASE);
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@ -400,7 +393,6 @@ combine(void* combined_x,
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int num_combined_tokens, int hidden, int num_topk,
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int num_max_dispatch_tokens_per_rank,
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int num_experts, int rank, int num_ranks,
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int* usage_flag,
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int num_warp_groups, int num_warps_per_group,
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int phases, bool zero_copy) {
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const auto sm_id = static_cast<int>(blockIdx.x);
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@ -497,13 +489,11 @@ combine(void* combined_x,
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if ((phases & LOW_LATENCY_RECV_PHASE) == 0)
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return;
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// Wait all ranks to arrive and notify usages
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// Wait all ranks to arrive
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if (responsible_expert_idx < num_experts) {
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EP_DEVICE_ASSERT(num_warps_per_group > 1);
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if (sub_warp_id == 0 and lane_id == 0) {
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while (ld_acquire_sys_global(rdma_recv_flag + responsible_expert_idx) == 0);
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} else if (sm_id == 0 and sub_warp_id == 1 and lane_id == 0) {
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atomicAdd_system(usage_flag, 1);
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}
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}
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cg::this_grid().sync();
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@ -555,9 +545,8 @@ void combine(void* combined_x,
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int* next_clean, int num_next_clean_int,
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int num_combined_tokens, int hidden, int num_max_dispatch_tokens_per_rank,
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int num_topk, int num_experts, int rank, int num_ranks,
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void* workspace, int* usage_flag,
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int num_device_sms, cudaStream_t stream,
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int phases, bool zero_copy) {
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void* workspace, int num_device_sms,
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cudaStream_t stream, int phases, bool zero_copy) {
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constexpr int kNumMaxTopk = 9;
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const int num_warp_groups = ceil_div(num_experts, num_device_sms);
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const int num_warps_per_group = 32 / num_warp_groups;
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@ -582,7 +571,6 @@ LAUNCH_KERNEL(&cfg, combine_func, \
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num_combined_tokens, hidden, num_topk, \
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num_max_dispatch_tokens_per_rank, \
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num_experts, rank, num_ranks, \
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usage_flag, \
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num_warp_groups, num_warps_per_group, \
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phases, zero_copy); } break
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@ -457,19 +457,6 @@ class Buffer:
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async_finish, allocate_on_comm_stream)
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return combined_x, combined_topk_weights, EventOverlap(event)
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def get_low_latency_usage_flag(self):
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"""
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Return a host-side integer flag, which indicates the stages of low-latency kernels.
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The initial value is 0, the low-latency dispatch will add 1 before communication, the low-latency combine
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will add 1 after communication.
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This is useful when there is no two-batch overlap, and you want to overlap H2D/D2H transfer with attention layers.
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Returns:
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flag: the host-side integer flag pointer. The value is in `int`, but returns a `uint64_t` pointer. Please
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`reinterpret_cast` the returned value into `int*`.
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"""
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return self.runtime.get_low_latency_usage_flag()
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def clean_low_latency_buffer(self, num_max_dispatch_tokens_per_rank: int, hidden: int, num_experts: int) -> None:
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"""
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As low-latency kernels require part of the buffer to be zero-initialized, so it is vital to clean the buffer
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@ -166,7 +166,6 @@ def test_loop(local_rank: int, num_local_ranks: int):
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print(f'Allocating buffer size: {num_rdma_bytes / 1e6} MB ...', flush=True)
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buffer = deep_ep.Buffer(group, num_rdma_bytes=num_rdma_bytes, low_latency_mode=True,
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num_qps_per_rank=num_experts // num_ranks)
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buffer.get_low_latency_usage_flag()
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test_main(num_tokens, hidden, num_experts, num_topk, rank, num_ranks, group, buffer, seed=1)
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do_pressure_test = False
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